GPU Platform Hardware Engineer@ Intel

Job Information

Job Description:

The GPU HW IP team (GHI) is responsible for delivering industry-leading GPU (3D, Media, Compute, and Display) hardware intellectual property (IP) blocks and system-on-a-chip (SoC) products for discrete graphics and throughput computing. We strive to lead the industry through continuous innovation and world-class engineering. We work closely with partners across Intel and do not let any organizational boundary get in the way of solving problems. We are looking for a GPU Hardware Engineer to join our team.

Who You Are

In this position your role will fall under one of two groups of responsibilities/functions:

1. System Integration Function:

  • Working with other specialists that are members of the IP Design, IP Design Verification, System Verification, DFT, STA, and Physical Design teams to implement designs/flows for sophisticated GPU IP.
  • As a GPU IP Integration Engineer, you will have responsibilities to integrate various 3D/Compute, Clocks and Reset, Memory Fabric, DFX and Power management building blocks to construct the GPU IPs and ensure the design meets Functional, DFX, CDC, Timing and Power requirements.
  • Partitioning, feed through and repeater planning and implementation to meet stringent timing requirements for a given floorplan.
  • Creation of timing/synthesis constraints (SDC) and their verification.
  • Running quality checks on RTL such as LINT, DFT, connectivity and structural checks to ensure smooth physical implementation.
  • Running CDC and RDC tools on the design and analyzing issues to fix them.
  • Running Equivalence checking to compare different RTL models.
  • Capturing the power intent of the IP in UPF format and verification of its implementation.
  • Working with CAD and backend Flow teams to define and improve front-end design methodologies.

2. GPU Verification Function:

  • Integration of IP subsystems to build complete GPU/Compute pipeline.
  • Construction of multiple SKUs of GPU sub-system by integration of 3D/Compute pipeline, memory fabric, clock, rest and power management logic through automated flows and upgrading the flows continuously to ensure high efficiency, scalability and performance.
  • Architecting and building Sub-system/System level scalable Testbench environments in SystemVerilog
  • Building testbench and associated verification components, scalable transactors for the GPU pipeline. Building industry protocol (such as CXL) transactors for simulation/emulation
  • Functional bring-up and debug of GPU/Compute pipeline.
  • Debug of complex power management schemes, Boot flows, 3D/Compute pipelines and high speed and coherent Memory fabric
  • Building tools, flows and methodologies to support verification.
  • Deliver GPU IP to internal customers hardware (functional, performance, power), software, and SoC teams and facilitate the integration of the IP in the customers environment/flows.
  • Maintain and build capabilities to manage continuous integration capabilities for Graphics IPs

Behavior skills we are looking for:

The ideal candidate will have the following skills in addition to the qualifications listed.

  • Thoughtful and perceptive analytical skills
  • A genuine curiosity for understanding the system.
  • Be dedicated and committed to creative problem solving and getting things done.
  • Work well in a team environment.
  • Strong verbal and written communication skill


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or any STEM related degree with 2+ years’ experience. Or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or any STEM related degree with 1+ years’ experience in all of the following:

  • Logic Design and Architecture
  • System Verilog
  • Scripting (Python, TCL, PERL, BASH)
  • Revision control (git or perforce)

Preferred Qualifications:

  • Experience designing/integrating/verifying GPU sub-systems.
  • Experience designing/integrating/verifying high speed interconnects, power management schemes, high performance sub-systems.
  • Experience in using industry standard tools (simulators, (VCS/Xcelium) and waveform debug tools (Verdi/DVE), implementation: Design Compiler, Primetime, Spyglass).

Experience Level: Mid-Senior
Work From: Hybrid Poland

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